서지주요정보
다결정 실리콘을 사용한 새로운 수직구조 트랜지스터의 제작 및 특성 평가 = Fablication and characterization of a novel vertical submicron polycrystalline silicon FET
서명 / 저자 다결정 실리콘을 사용한 새로운 수직구조 트랜지스터의 제작 및 특성 평가 = Fablication and characterization of a novel vertical submicron polycrystalline silicon FET / 이가원.
저자명 이가원 ; Lee, Ga-Won
발행사항 [대전 : 한국과학기술원, 1996].
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소장정보

등록번호

8006266

소장위치/청구기호

학술문화관(문화관) 보존서고

MEE 96051

SMS전송

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초록정보

In this paper, a novel vertical polycrystalline silicon(poly-Si) FET is proposed. Here, the channel length is determined by the thickness of active layer, so that the submicron FET can be made without submicron lithographic equipment. The structure is expected to be suitable for the fast circuit devices when the poly-Si film has the vertical grain structure. This is because carriers flow in the vertical direction where there are less grain boundarier than in lateral direction. The most troublesome problem in the proposed device was such a large stand-by current that even on-current can be covered. This stand-by current is found to be due to the punch-through. We solved this problem by modifying the device structure(surround gated vertical submicron FET). Of corse, the channel doping is also effective, but surround gated FET has low stand-by current without significant threshold voltage shift. In this paper, the proposed device is characterized. The improvement in mobility is not seen evidently, but if the modified structure(surround gated vertical FET) is adapted, the expected characteristics can be obtained, which presented in varies experimental results.

서지기타정보

서지기타정보
청구기호 {MEE 96051
형태사항 iii, 78 p. : 삽도 ; 26 cm
언어 한국어
일반주기 부록 수록
저자명의 영문표기 : Ga-Won Lee
지도교수의 한글표기 : 이희철
공동교수의 한글표기 : 한철희
지도교수의 영문표기 : Hee-Chul Lee
공동교수의 영문표기 : Chul-Hi Han
학위논문 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과,
서지주기 참고문헌 : p. 68-70
주제 수직구조트랜지스터
Submicron
다결정실리콘
Vertical transistor
Submicron
Polycrystalline silicon
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