Design recovery algorithm is used to convert sequence control programs using RLL(Relay Ladder Logic) into equivalent SFC(Sequential Function Chart) programs. To be converted to SFC, the conventional design recovery algorithm requires RLL diagrams with strict constraints. There are also some cases when it is impossible to convert to compact SFC. In this paper, three additional methods for performing design recovery are proposed. The first method is state reduction. By state reduction, RLL outputs are divided into input variable group, controlled output variable group, and state variable group before applying the design recovery algorithm. The second method is modified design recovery algorithm. It contains the virtual edge method, and extended decomposition method grouped by dependency. Using these methods, we can convert into SFC more compactly. The last method is to convert the timer and counter used in RLL program into equivalent form of SFC. In this method, we define the state of timer and counter, and finally transform into SFC by design recovery algorithm. Appling the above three methods, we can achieve design recovery for more practical RLL program. Furthermore, the conversion into compact SFC saves the processing time.
