VLSI technology enables us to design a ASIP(Application Specific Instruction set Processor) which can consist of only necessary functional blocks in according to application domain. The architecture of ASIP has to be changed according to the selected architecture parameters. Therefore, the design of ASIPs needs an architecture synthesizer which automatically synthesizes an application processor according to the parameters which are extracted from application domain-specific programs.
In this thesis, we implemented Architecture Synthesizer for ASIPs, called SS-ASIP, which uses MetaCore architecture to synthesize a new application processor. MetaCore whose architecture is oriented to DSP applications is parameterized by data bitwidth, necessary functional blocks, the capability and functionality of these blocks and so on. First, we show the architecture of MetaCore, a flexible DSP core, and the procedure of architecture synthesis which we adopted. Second, we explain informations which are necessary for synthesis. Finally, the netlist which is the output of SS-ASIP is physically synthesized using COMPASS environment.
